vl_simd.h

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#ifndef VL_SIMD_H
#define VL_SIMD_H
 
#include <vl/vl_memory.h>
#include <vl/vl_numtypes.h>
 
/* ============================================================================
 * Vector Type Definitions
 * ============================================================================
 */
 
typedef struct VL_ALIGN_HINT(16) vl_simd_vec4_f32_
{
    vl_float32_t components[4];
} vl_simd_vec4_f32;
 
typedef struct VL_ALIGN_HINT(32) vl_simd_vec8_f32_
{
    vl_float32_t components[8];
} vl_simd_vec8_f32;
 
typedef struct VL_ALIGN_HINT(16) vl_simd_vec4_i32_
{
    vl_int32_t components[4];
} vl_simd_vec4_i32;
 
typedef struct VL_ALIGN_HINT(32) vl_simd_vec8_i32_
{
    vl_int32_t components[8];
} vl_simd_vec8_i32;
 
#ifdef _MSC_VER
#pragma warning(push)
#pragma warning(disable : 4324)
#endif
typedef struct VL_ALIGN_HINT(32) vl_simd_vec8_i16_
{
    vl_int16_t components[8];
} vl_simd_vec8_i16;
#ifdef _MSC_VER
#pragma warning(pop)
#endif
 
typedef struct VL_ALIGN_HINT(16) vl_simd_vec16_u8_
{
    vl_uint8_t components[16];
} vl_simd_vec16_u8;
 
typedef struct VL_ALIGN_HINT(32) vl_simd_vec32_u8_
{
    vl_uint8_t components[32];
} vl_simd_vec32_u8;
 
/* ============================================================================
 * Function Pointer Types for Runtime Dispatch
 *
 * Each operation is defined as a function pointer type. The global
 * vlSIMDFunctions table is populated with concrete implementations at init
 * time.
 * ============================================================================
 */
 
typedef vl_simd_vec4_f32 (*vl_simd_load_vec4f32_fn)(const vl_float32_t*);
typedef void (*vl_simd_store_vec4f32_fn)(vl_float32_t*, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_splat_vec4f32_fn)(vl_float32_t);
typedef vl_simd_vec4_f32 (*vl_simd_add_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_sub_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_mul_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_div_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_fma_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_float32_t (*vl_simd_hsum_vec4f32_fn)(vl_simd_vec4_f32);
typedef vl_simd_vec8_f32 (*vl_simd_load_vec8f32_fn)(const vl_float32_t*);
typedef void (*vl_simd_store_vec8f32_fn)(vl_float32_t*, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_add_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_mul_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_fma_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_splat_vec8f32_fn)(vl_float32_t);
typedef vl_simd_vec8_f32 (*vl_simd_sub_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_lt_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_gt_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_eq_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_and_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_or_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_xor_vec8f32_fn)(vl_simd_vec8_f32, vl_simd_vec8_f32);
typedef vl_simd_vec8_f32 (*vl_simd_not_vec8f32_fn)(vl_simd_vec8_f32);
typedef vl_simd_vec4_f32 (*vl_simd_cmp_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_bitwise_vec4f32_fn)(vl_simd_vec4_f32, vl_simd_vec4_f32);
typedef vl_simd_vec4_f32 (*vl_simd_not_vec4f32_fn)(vl_simd_vec4_f32);
typedef vl_float32_t (*vl_simd_hmax_vec4f32_fn)(vl_simd_vec4_f32);
typedef vl_float32_t (*vl_simd_hmin_vec4f32_fn)(vl_simd_vec4_f32);
typedef vl_float32_t (*vl_simd_hprod_vec4f32_fn)(vl_simd_vec4_f32);
typedef vl_float32_t (*vl_simd_extract_lane_vec4f32_fn)(vl_simd_vec4_f32, int);
typedef vl_simd_vec4_f32 (*vl_simd_broadcast_lane_vec4f32_fn)(vl_simd_vec4_f32, int);
typedef vl_simd_vec4_i32 (*vl_simd_load_vec4i32_fn)(const vl_int32_t*);
typedef void (*vl_simd_store_vec4i32_fn)(vl_int32_t*, vl_simd_vec4_i32);
typedef vl_simd_vec4_i32 (*vl_simd_add_vec4i32_fn)(vl_simd_vec4_i32, vl_simd_vec4_i32);
typedef vl_simd_vec4_i32 (*vl_simd_mul_vec4i32_fn)(vl_simd_vec4_i32, vl_simd_vec4_i32);
typedef vl_simd_vec8_i16 (*vl_simd_load_vec8i16_fn)(const vl_int16_t*);
typedef void (*vl_simd_store_vec8i16_fn)(vl_int16_t*, vl_simd_vec8_i16);
typedef vl_simd_vec8_i16 (*vl_simd_add_vec8i16_fn)(vl_simd_vec8_i16, vl_simd_vec8_i16);
typedef vl_simd_vec32_u8 (*vl_simd_load_vec32u8_fn)(const vl_uint8_t*);
typedef void (*vl_simd_store_vec32u8_fn)(vl_uint8_t*, vl_simd_vec32_u8);
 
/* ============================================================================
 * Global Function Pointer Table
 *
 * This table is set once by vlSIMDInit() based on detected CPU capabilities.
 * All threads read from it safely after initialization.
 * ============================================================================
 */
 
typedef struct
{
    vl_simd_load_vec4f32_fn load_vec4f32;
    vl_simd_store_vec4f32_fn store_vec4f32;
    vl_simd_splat_vec4f32_fn splat_vec4f32;
    vl_simd_add_vec4f32_fn add_vec4f32;
    vl_simd_sub_vec4f32_fn sub_vec4f32;
    vl_simd_mul_vec4f32_fn mul_vec4f32;
    vl_simd_div_vec4f32_fn div_vec4f32;
    vl_simd_fma_vec4f32_fn fma_vec4f32;
    vl_simd_hsum_vec4f32_fn hsum_vec4f32;
    vl_simd_load_vec8f32_fn load_vec8f32;
    vl_simd_store_vec8f32_fn store_vec8f32;
    vl_simd_add_vec8f32_fn add_vec8f32;
    vl_simd_mul_vec8f32_fn mul_vec8f32;
    vl_simd_fma_vec8f32_fn fma_vec8f32;
    vl_simd_splat_vec8f32_fn splat_vec8f32;
    vl_simd_sub_vec8f32_fn sub_vec8f32;
    vl_simd_lt_vec8f32_fn lt_vec8f32;
    vl_simd_gt_vec8f32_fn gt_vec8f32;
    vl_simd_eq_vec8f32_fn eq_vec8f32;
    vl_simd_and_vec8f32_fn and_vec8f32;
    vl_simd_or_vec8f32_fn or_vec8f32;
    vl_simd_xor_vec8f32_fn xor_vec8f32;
    vl_simd_not_vec8f32_fn not_vec8f32;
    vl_simd_cmp_vec4f32_fn lt_vec4f32;
    vl_simd_cmp_vec4f32_fn gt_vec4f32;
    vl_simd_cmp_vec4f32_fn eq_vec4f32;
    vl_simd_bitwise_vec4f32_fn and_vec4f32;
    vl_simd_bitwise_vec4f32_fn or_vec4f32;
    vl_simd_bitwise_vec4f32_fn xor_vec4f32;
    vl_simd_not_vec4f32_fn not_vec4f32;
    vl_simd_hmax_vec4f32_fn hmax_vec4f32;
    vl_simd_hmin_vec4f32_fn hmin_vec4f32;
    vl_simd_hprod_vec4f32_fn hprod_vec4f32;
    vl_simd_extract_lane_vec4f32_fn extract_lane_vec4f32;
    vl_simd_broadcast_lane_vec4f32_fn broadcast_lane_vec4f32;
    vl_simd_load_vec4i32_fn load_vec4i32;
    vl_simd_store_vec4i32_fn store_vec4i32;
    vl_simd_add_vec4i32_fn add_vec4i32;
    vl_simd_mul_vec4i32_fn mul_vec4i32;
    vl_simd_load_vec8i16_fn load_vec8i16;
    vl_simd_store_vec8i16_fn store_vec8i16;
    vl_simd_add_vec8i16_fn add_vec8i16;
    vl_simd_load_vec32u8_fn load_vec32u8;
    vl_simd_store_vec32u8_fn store_vec32u8;
 
    const char* backend_name;
} vl_simd_functions_t;
 
VL_API extern vl_simd_functions_t vlSIMDFunctions;
 
/* ============================================================================
 * Initialization
 * ============================================================================
 */
 
VL_API const char* vlSIMDInit(void);
 
/* ============================================================================
 * Inline API (User-Facing)
 *
 * All operations are exposed as inline functions that dereference
 * vlSIMDFunctions. This provides a transparent, backend-agnostic interface.
 * ============================================================================
 */
 
/* --- 4-Wide Float (F32) Load/Store --- */
 
static inline vl_simd_vec4_f32 vlSIMDLoadVec4F32(const vl_float32_t* ptr) { return vlSIMDFunctions.load_vec4f32(ptr); }
 
static inline void vlSIMDStoreVec4F32(vl_float32_t* ptr, vl_simd_vec4_f32 v) { vlSIMDFunctions.store_vec4f32(ptr, v); }
 
static inline vl_simd_vec4_f32 vlSIMDSplatVec4F32(vl_float32_t scalar) { return vlSIMDFunctions.splat_vec4f32(scalar); }
 
/* --- 4-Wide Float (F32) Arithmetic --- */
 
static inline vl_simd_vec4_f32 vlSIMDAddVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.add_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDSubVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.sub_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDMulVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.mul_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDDivVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.div_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDFmaVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b, vl_simd_vec4_f32 c)
{
    return vlSIMDFunctions.fma_vec4f32(a, b, c);
}
 
/* --- 4-Wide Float (F32) Reductions --- */
 
static inline vl_float32_t vlSIMDHsumVec4F32(vl_simd_vec4_f32 v) { return vlSIMDFunctions.hsum_vec4f32(v); }
 
static inline vl_float32_t vlSIMDHmaxVec4F32(vl_simd_vec4_f32 v) { return vlSIMDFunctions.hmax_vec4f32(v); }
 
static inline vl_float32_t vlSIMDHminVec4F32(vl_simd_vec4_f32 v) { return vlSIMDFunctions.hmin_vec4f32(v); }
 
static inline vl_float32_t vlSIMDHprodVec4F32(vl_simd_vec4_f32 v) { return vlSIMDFunctions.hprod_vec4f32(v); }
 
/* --- 4-Wide Float (F32) Comparisons --- */
 
static inline vl_simd_vec4_f32 vlSIMDLtVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.lt_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDGtVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.gt_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDEqVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.eq_vec4f32(a, b);
}
 
/* --- 4-Wide Float (F32) Bitwise Operations --- */
 
static inline vl_simd_vec4_f32 vlSIMDAndVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.and_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDOrVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.or_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDXorVec4F32(vl_simd_vec4_f32 a, vl_simd_vec4_f32 b)
{
    return vlSIMDFunctions.xor_vec4f32(a, b);
}
 
static inline vl_simd_vec4_f32 vlSIMDNotVec4F32(vl_simd_vec4_f32 a) { return vlSIMDFunctions.not_vec4f32(a); }
 
/* --- 4-Wide Float (F32) Lane Operations --- */
 
static inline vl_float32_t vlSIMDExtractLaneVec4F32(vl_simd_vec4_f32 v, int lane)
{
    return vlSIMDFunctions.extract_lane_vec4f32(v, lane);
}
 
static inline vl_simd_vec4_f32 vlSIMDBroadcastLaneVec4F32(vl_simd_vec4_f32 v, int lane)
{
    return vlSIMDFunctions.broadcast_lane_vec4f32(v, lane);
}
 
/* --- 8-Wide Float (F32) Load/Store --- */
 
static inline vl_simd_vec8_f32 vlSIMDLoadVec8F32(const vl_float32_t* ptr) { return vlSIMDFunctions.load_vec8f32(ptr); }
 
static inline void vlSIMDStoreVec8F32(vl_float32_t* ptr, vl_simd_vec8_f32 v) { vlSIMDFunctions.store_vec8f32(ptr, v); }
 
/* --- 8-Wide Float (F32) Arithmetic --- */
 
static inline vl_simd_vec8_f32 vlSIMDAddVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.add_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDMulVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.mul_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDFmaVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b, vl_simd_vec8_f32 c)
{
    return vlSIMDFunctions.fma_vec8f32(a, b, c);
}
 
/* --- Integer Operations --- */
 
static inline vl_simd_vec4_i32 vlSIMDLoadVec4I32(const vl_int32_t* ptr) { return vlSIMDFunctions.load_vec4i32(ptr); }
 
static inline void vlSIMDStoreVec4I32(vl_int32_t* ptr, vl_simd_vec4_i32 v) { vlSIMDFunctions.store_vec4i32(ptr, v); }
 
static inline vl_simd_vec4_i32 vlSIMDAddVec4I32(vl_simd_vec4_i32 a, vl_simd_vec4_i32 b)
{
    return vlSIMDFunctions.add_vec4i32(a, b);
}
 
static inline vl_simd_vec4_i32 vlSIMDMulVec4I32(vl_simd_vec4_i32 a, vl_simd_vec4_i32 b)
{
    return vlSIMDFunctions.mul_vec4i32(a, b);
}
 
static inline vl_simd_vec8_i16 vlSIMDLoadVec8I16(const vl_int16_t* ptr) { return vlSIMDFunctions.load_vec8i16(ptr); }
 
static inline void vlSIMDStoreVec8I16(vl_int16_t* ptr, vl_simd_vec8_i16 v) { vlSIMDFunctions.store_vec8i16(ptr, v); }
 
static inline vl_simd_vec8_i16 vlSIMDAddVec8I16(vl_simd_vec8_i16 a, vl_simd_vec8_i16 b)
{
    return vlSIMDFunctions.add_vec8i16(a, b);
}
 
static inline vl_simd_vec32_u8 vlSIMDLoadVec32U8(const vl_uint8_t* ptr) { return vlSIMDFunctions.load_vec32u8(ptr); }
 
static inline void vlSIMDStoreVec32U8(vl_uint8_t* ptr, vl_simd_vec32_u8 v) { vlSIMDFunctions.store_vec32u8(ptr, v); }
 
static inline vl_simd_vec8_f32 vlSIMDSplatVec8F32(vl_float32_t scalar) { return vlSIMDFunctions.splat_vec8f32(scalar); }
 
static inline vl_simd_vec8_f32 vlSIMDSubVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.sub_vec8f32(a, b);
}
 
/* --- 8-Wide Float (F32) Comparisons --- */
 
static inline vl_simd_vec8_f32 vlSIMDLtVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.lt_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDGtVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.gt_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDEqVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.eq_vec8f32(a, b);
}
 
/* --- 8-Wide Float (F32) Bitwise Operations --- */
 
static inline vl_simd_vec8_f32 vlSIMDAndVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.and_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDOrVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.or_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDXorVec8F32(vl_simd_vec8_f32 a, vl_simd_vec8_f32 b)
{
    return vlSIMDFunctions.xor_vec8f32(a, b);
}
 
static inline vl_simd_vec8_f32 vlSIMDNotVec8F32(vl_simd_vec8_f32 a) { return vlSIMDFunctions.not_vec8f32(a); }
 
#endif